sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan ordering number : enn7817 52404tn (ot) no.7817-1/8 overview the LA6565 is a four-channel btl plus one-channel h bridge actuator driver developed for use in cd and dvd drives. the btl driver channels 1 and 2 include built-in operational amplifiers allowing the LA6565 to support a wide range of applications. application ? five-channel (btl: 4 channels, h bridge: 1 channel) cd motor driver features and functions ? five power amplifier channels on a single chip (bridge connection (btl): 4 channels, h bridge: 1 channel) ? io max: 1 a ? built-in level shifters (except for the h bridge channel) ? muting circuits (output on/off, two systems) (the muting circuits operate for the btl amplifiers. they do not apply to the h bridge or regulator circuits.) ? built-in regulator (uses an external pnp transistor and is set with an external resistor.) ? output voltage setting function (loading driver) ? built-in independent operational amplifiers ? thermal shutdown circuit sanyo semiconductors data sheet LA6565 monolithic linear ic five-channel cd actuator driver (btl: 4 channels, h bridge: 1 channel) any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein. specifications maximum ratings at ta = 25c parameter symbol conditions ratings unit supply voltage v cc max 14 v allowable power dissipation pd max independent ic 0.8 w specified pcb * 2w maximum output current i o max for each of the channel 1 to 4 and h bridge outputs 1 a maximum input voltage vinb 13 v mute pin voltage vmute 13 v operating temperature topr C30 to +85 c storage temperature tstg C55 to +150 c recommended operating conditions at ta = 25c parameter symbol conditions ratings unit supply voltage v cc 5.6 to 13 v note * :specified pcb (76.1mm 114.3 mm 1.6 mm), pcb meterial : glass epoxy
no.7817- 2 /8 LA6565 parameter symbol conditions ratings unit min typ max [overall] quiescent current when on icc-on btl amplifier output on, loading block off * 1 30 50 ma quiescent current when off icc-off all outputs off * 1 10 15 ma thermal shutdown circuit operating temperature tsd * 7 150 175 200 c [vref amplifier] vref amplifier offset voltage vref-offset C10 +10 mv vref input voltage range vref-in 1 v cc C 1.5 v vref-out output current i-vref-out 1 ma [operational amplifier] (independent) input voltage range vin (op) 0 v cc C 1.5 v output current (sink) sink (op) 2 ma output current (source) source (op) 300 500 a output offset voltage voff (op) C10 +10 mv residual current (sink) vce-sink (op) i o (sink side) = 1 ma 0.6 v [btl amplifier block] (channels 1 to 4) output offset voltage voff the voltage difference between each channel C50 +50 mv outputs * 2, * 3 input voltage range vin input voltage range of the input operational 0 v cc C 1.5 v amplifiers output voltage v o io = 0.5 a, the voltage between v o + and v o C 5.7 6.2 v in each channel closed circuit voltage gain vg the gain from the input to the output with the 7.2 8 9 times input amplifier set to 0 db * 2, * 3 slew rate sr for the independent amplifier. times 2 when 0.5 v/ s between outputs. * 7 muting on voltage vmute-on the output on voltage, for each mute function * 4 2.5 v muting off voltage vmute-off the output off voltage, for each mute function * 4 0.5 v [input amplifier block] (channels 1 and 2) input voltage range vin-op 0 v cc C 1.5 v output current (sink) sink-op 2 ma output current (source) source-op * 5 300 500 a output offset voltage voff-op C10 +10 mv [loading block] (channel 5, h bridge circuit) output voltage vo-load for forward/reverse operation, io = 0.5 a, 5.7 6.5 v vcont = v cc * braking output saturation voltage vce-break the output voltage during braking * 6 0.3 v low-level input voltage vin-l 1 v high-level input voltage vin-h 2 v [power supply block] (uses an external 2sb632k pnp transistor) power supply output vout i o = 200 ma 1.260 1.285 1.310 v reg-in sink current reg-in-sink external pnp transistor base current 5 10 ma line regulation ? voln 6 v v cc 12 v, i o = 200 ma 10 100 mv load regulation ? vold 5 ma i o 200 ma 10 100 mv electrical characteristics at ta = 25 c, v cc 1 = v cc 2 = 8 v, v ref = 2.5 v * 1: the total current dissipation for vccp1, vccp2, and vccs with no load. * 2: the input amplifier is a buffer amplifier. * 3: the voltage difference between the two sides of the load (12 ). * 4: when the mute pin is high, the output will be on, and when low, the output will be off (high-impedance state). * 5: the input operational amplifier source is constant current. since the 11 k resistor between this and the next stage functions as the load, the input operational amplifier gain must be set carefully. * 6: the braking operation is a short (to ground) braking operation. the sink side output is on at this time. * 7: design guarantee.
no.7817- 3 /8 LA6565 (6.2) 36 1 19 18 0.8 2.0 17.8 0.3 (4.9) 2.7 0.65 0.25 (0.5) 7.9 10.5 2.25 2.45max 0.1 package dimensions unit : mm 3251 sanyo : hsop36r (375mil) - -20 0 0.5 1.0 0.8 1.5 2.0 2.5 20 0 40 80 60 100 0.42 1.04 ambient temperature, t a c pd max t a allo w able po wer dissipation, pd max w mounted on the specified printed circuit board. specif ied pcb: 76.1mm 114.3mm 1.6mm pcb material: glass epoxy independent ic ila06754
no.7817- 4 /8 LA6565 internal block diagram + + + 11 k 44 k + thermal shutdown circuit + + 1 2 3 4 5 15 16 10 11 12 13 14 fr 6 7 8 9 17 18 35 34 33 32 31 30 29 27 26 22 21 20 19 fr 23 24 25 36 28 + + + + 44 k 11 k power system ground signal system ground 44 k 44 k 11 k (load output voltage setting) fw d + + to vrefout to vrefout ch1 mute turns the corresponding channel on/off. high: output on, low: output off 11 k signal system power supply power system ground + reg_in re g_out (v cc ) sgnd rev vcont vccp2 mute1 vlo mute234 vlo + v in 4 v o 4 + v in 4 v o 4 vref_in v o 3 + vref_out v o 3 reg_out v o 2 + reg_in v o 2 v in +op v o 1 v in -op v o 1 + vo_op vccp1 v in 3 vccs v in 3 v in 1 + v in 2 v in 1 v in 2 v in 1 v in 2 + ch2,3,4
no.7817- 5 /8 LA6565 sample application circuit 1 fr fr vccp1 v o 1+ v o 1- v o 2+ v o 2- v o 3- v in 4- v in 4 v o 4- v o 4+ rev v o 3+ fw d v in 1- vco n t v in 1 v in 2+ fr fr v in 2- v in 1+ vccs v in 3 v o -op v in -op v in 2 v in 3- vlo + vlo - mute234 v cc 2 re g-out vref-in mute1 s-g n d v in +o p reg-in vref-o ut sled mo to r tracking co il focus coil loading motor v cc spindle mo to r 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 m m m 0.1 f 2.2 2.2 2.2 0.1 f 0.1 f 2.2 2.2 0.1 f 0.1 f v cc reg loading mute1 mute234 tracking sled spindle vref focus
no.7817- 6 /8 LA6565 pin no. pin name pin descriptions 1 fwd loading output direction switching (fwd). loading system logic input. 2 rev loading output direction switching (rev). loading system logic input. 3 v cc 2 channels 3, 4, and loading power stage power supply 4 vlo C loading output (C) 5 vlo + loading output (+) 6 vo4 + channel 4 output (+) 7 vo4C channel 4 output (C) 8 vo3 + channel 3 output (+) 9 vo3 C channel 3 output (C) 10 vo2+ channel 2 output (+) 11 vo2 C channel 2 output (C) 12 vo1 C channel 1 output (C) 13 vo1 + channel 1 output (+) 14 vccp1 channels 1 and 2 power stage power supply 15 vccs signal system power supply 16 vin1 + channel 1 input. input operational amplifier + input. 17 vin1 C channel 1 input. input operational amplifier C input. 18 vin1 channel 1 input. input operational amplifier output. 19 vin2 + channel 2 input. input operational amplifier + input. 20 vin2 C channel 2 input. input operational amplifier C input. 21 vin2 channel 2 input. input operational amplifier output. 22 vin3C channel 3 input. input operational amplifier C input. 23 vin3 channel 3 input. input operational amplifier output. 24 vo_op operational amplifier output 25 vin-op operational amplifier C input 26 vin+op operational amplifier + input 27 reg_in regulator error amplifier output. connect this pin to the base of the external pnp transistor. 28 reg_out regulator error amplifier input (+). 29 vref_out vref amplifier (voltage follower) output. 30 vref_in vref input. apply the external reference voltage to this pin. 31 vin4 channel 4 input. input operational amplifier output. 32 vin4 C channel 4 input. input operational amplifier C input. 33 mute234 controls the on/off state of channels 2, 3, and 4. 34 mute1 channel 1 output on/off control 35 vcont loading block output high-level voltage setting 36 s_gnd signal system ground pin functions
no.7817- 7 /8 LA6565 pin functions pin no. pin name symbol description equivalent circuit 16 17 18 19 20 21 22 23 32 31 26 25 24 input (ch1 to 4) vin1 + vin1 C vin1 vin2 + vin2 C vin2 vin3 C vin3 vin4 C vin4 vin + op vin C op vo_op inputs (channels 1 to 4 and the independent operational amplifier) sg nd vccs v in *+ v in * v in * 300 300 300 1 2 input (h bridge) fwd rev logic inputs the ic is set to one of four modes, forward, reverse, brake, and free running by the combination of high and low values applied to these pins. fwd rev sgnd 50 k 50 k 50 k 50 k 13 12 10 11 8 9 6 7 output (btl-amp) vo1 + vo1 C vo2 + vo2 C vo3 + vo3 C vo4 + vo4 C channel 1 to 4 outputs vccp * rf v o * 1 k 1 k 4 5 35 output (h bridge) vlo C vlo + vcont h bridge (loading) output and loading output setting vlo + vlo vccp2 vco n t 20 k 20 k 1k 1k 33 34 mute mute234 mute1 btl amplifier output on/off state setting. high: output on low: output off mute * sgnd 40 k vccs 20 k 10 k
ps no.7817- 8 /8 LA6565 specifications of any and all sanyo products described or contained herein stipu late the performance , characteristics, and functions of the described products in the independent stat e, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's p roducts or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability product s. however, any and al l semiconductor products fail with some probability. it is possible that these pro babilistic failures coul d give rise to accidents or events that could endanger human lives, that could giv e rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt sa fety measures s o t hat these kinds of accidents or events cannot occur. such measures include but a re not limited to protectiv e circuits and error prevention circuits for safe design, redundant design, and st ructural design. in the event that any or all sanyo products(including technical data,services) d escribed o r contained herein are controlled under any of applicable local export control law s and regulations, such products m ust not be e xpor ted without obtaining the e xpor t license from the author ities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by a ny means, electronic o r mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co. , ltd. any and all information described or contained herein are subject to change with out notice due to product/technology improvement, etc. when designing equipment, refer to the "del ivery specification " for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for ex ample only ; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of inte llectual property rights or other rights of third parties. this catalog provides information as of may, 2004. specifications and information herein are subject to change without notice. fwd rev vlo + vlo C loading output l l off off off * 1 h h l forward h l l h reverse h l l short-circuit braking * 2 * 1. the output goes to the high-impedance state. * 2. in braking mode, the sink side transistor is turned on (for short-circuit braking). the vlo + and vlo C pins go to a level that is essentially the ground level. relationship between the mute pins and the power supply systems (vccp*) truth table (loading (h bridge) block) ch1(btl) ch2(btl) ch3(btl) ch4(btl) vccp1 vccp2 mute1 ch5(h bridge) mute234
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